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Feature #3920

open

Indigenous EEG Circuit development

Added by Sudalaimani C about 1 year ago. Updated 8 months ago.

Status:
New
Priority:
Normal
Assignee:
Remesh Kumar K R
Start date:
07/10/2025
Due date:
01/30/2026 (about 6 months late)
% Done:

0%

Estimated time:
(Total: 0:00 h)
Planned Due Date:

Subtasks 7 (7 open — 0 closed)

Feature #3921: Indigenous 2 Channel EEG Circuit developmentNewRemesh Kumar K R07/10/2025

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Feature #3923: Indigenous 8 Channel EEG Circuit developmentNewRemesh Kumar K R07/10/2025

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Feature #3922: Indigenous 4 Channel EEG Circuit developmentNewRemesh Kumar K R10/10/202501/30/2026

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Feature #4489: Communication between PC and device through WiFi, BLE NewRemesh Kumar K R11/21/202501/16/2026

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Feature #4490: Solving the ADS Interface issueNewRemesh Kumar K R11/14/202501/30/2026

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Feature #4491: Jetson Board based Device (Base station)NewRemesh Kumar K R10/10/202501/16/2026

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Feature #4494: EEG Data Collection from SCTIMSTNewAshwin Sharma12/22/2025

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 #1

Updated by Sudalaimani C about 1 year ago

  • Subtask #3921 added
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 #2

Updated by Sudalaimani C about 1 year ago

  • Subtask #3922 added
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